As technologies further advance, a variety of electronic devices, such as mobile phones, tablet PCs, digital cameras, MP3 players and/or the like, have become popular. Each electronic device requires direct current power at a substantially constant voltage which may be regulated within a specified tolerance even when the current drawn by the electronic device may vary over a wide range. In order to maintain the voltage within the specified tolerance, a power converter (e.g., a switching dc/dc converter) coupled to the electronic device provides very fast transient responses, while keeping a stable output voltage under various load transients.
Hysteretic-based power converter control schemes such as the constant on-time scheme can enable power converters to provide fast transient responses. A buck converter employing the constant on-time control scheme may only comprise a feedback comparator and an on-timer. In operation, the feedback circuit of the power converter (e.g., buck converter) directly compares a feedback signal with an internal reference. When the feedback signal falls below the internal reference, the high-side switch of the power converter is turned on and remains on for the on-timer duration. As a result of turning on the high side switch, the inductor current of the power converter rises. The high-side switch of the power converter turns off when the on-timer expires, and does not turn on until the feedback signal falls below the internal reference again. In summary, when the constant on-time control scheme is employed in a power converter, the on-time of the high-side switch of the power converter is terminated by the on-timer. The off-time of the high-side switch of the power converter is terminated by the feedback comparator.
The power converters employing the constant on-time control scheme are simple to design. However, the constant on-time control scheme has an unwanted instability issues such as a sub-harmonic oscillation at the output voltage. The sub-harmonic oscillation may be caused by insufficient ESR (equivalent series resistance) of the output capacitor. The sub-harmonic oscillation may generate an excessive ripple voltage at the output of the power converter. Such an excessive ripple voltage is not preferable in many applications.
In order to avoid the sub-harmonic oscillation, a voltage ramp is injected into the feedback circuit to solve this instability issue. The voltage ramp may be implemented as an internal ramp such as a sensed current signal or an external ramp such as a voltage ramp generated by charging a ramp capacitor with a constant current source.
The voltage ramp has a significant impact on the operation of the power converter. More particularly, a large ramp signal is able to improve the stability of the power converter. On the other hand, a small ramp signal helps to improve the transient response of the power converter.
The ramp signal may be injected into the control loop of the power converter through adding the ramp signal and the feedback signal directly at a feedback input of an error amplifier. However, directly injecting the ramp signal into the control loop may cause some undesirable effects such as an input offset of the error amplifier and the like.
It would be desirable to provide an apparatus and/or a method for separating the ramp signal from the feedback signal so as to achieve both stable operations and fast transient responses under a variety of operating conditions.